Very nice! I/O working stable so far, after a small firmware adjustment.
After having the physical prototype in front of me, I was able to figure out a better layout which leaves the unused header pins accessible so the board can be placed on top of the Core
Next will be experiments chaining two of these shields for 6in/6out!
Current prototype seems to invert the phase on its outputs, the codec seems to handle differential/pseudo-differential differently (huh?) so I’ll factor this in for the next revision.
Noticing some interference with the audio jacks I am using for abuse-testing. Inserting a cable can cause nasty electromagnetic spikes from SGND reflecting onto the I2S data lines which can throw off the shield’s codec sync. Not good enough! The Axoloti/Ksoloti Core has been immune to such spikes (even with the shield connected).
Upgrading to a 4-layer board instead of 2 seems like a good idea, and while we’re here, we tuck in the I2S lines on an inner layer (stripline!). The design must simply be more robust, especially for haphazard DIY wiring situations. As always, if anyone has some suggestions or insights feel free to share.
(I’ve never been very clear on the SGND circuits in the Axoloti (and now Ksoloti) schematics - I was under the impression that the 33 ohm resistors and schottky diodes are meant to protect the codec/amp pins from the above surges - but it seems this resistance/potential discrepancy between SGND and GND causes the above problems on the I2S lines?)
The codec I am using is a TAC5142, a newer codec by TI. The reason other common codecs do not work well here are:
Most expect a MCLK of (in our case) 12.288 MHz to clock their input sampling parts.
The ones that can live without a 12.288 MHz clock, or can create their own from a different frequency clock (like the ADAU1961 does from 8 MHz MCO for Axoloti/Ksoloti), require an I2C connection to setup the registers on startup.
The Axoloti/Ksoloti 12.288 MHz MCLK (not 8 MHz MCO) generated by the ADAU1961 cannot be output or forwarded to other devices.
If we decide to pass I2C to the breakout board, Axolotis and older Ksolotis only have the common I2C1 on PB8 and PB9 available and broken out (While I2C2 on PB10 and PB11 is internal and dedicated for setting up the ADAU1961 codec. Its pins are only broken out on newest revision Ksolotis.
The TAC5142 is a ‘dumb’ codec that can be set up by setting hardware pins low or high. You can choose between controller and target (“master” and “slave”) and format (I2S, TDM) etc.
In short, it is a tricky decision between dumb codec with ‘plug and play’, or a smart codec that requires either a newest revision Core, or dedicating PB8 and PB9 to I2C, and some code to set up its registers.
